SJTAG

SJTAG Newsletter
http://www.sjtag.org

 

Issue 25 - Q3-2013

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From the Chair

You will all be aware that during June we ran an exercise to refresh our mailing list for this newsletter and ensure that we were sending it to people that wanted to continue receiving it. As the list was some five years old, we fully expected that some email addresses would have gone "stale" or that subscribers may have moved on to new roles or even retired in that time, so we were pleasantly surprised that two-thirds of the old mailing list re-subscribed.

On behalf of the Working Group, I'd like to thank you all for your continued interest in SJTAG, and hope that you continue to find our newsletter informative.


SJTAG Website

Following some problems in the early part of this year with the hosting service for our website, we moved to a new host during July. The migration was carried out very efficiently by our new hosts TSOhost in around an hour. There should be no observable differences in appearance or functionality, although you may find the site a little more responsive now.

Website migration forum thread: http://forums.sjtag.org/viewtopic.php?f=19&t=177


Design Example Analysis

During recent discussions, we have developed a block representation of a board design that features many of the device classes and interfaces that we could reasonably expect to find in many typical, real world designs. Our example may well contain a greater variety of those than you might expect to see in a single design, but that is largely the point: We want to be able to use this 'virtual design' to tease out the problems and identify what information we need to know about the design in order to perform a range of SJTAG operations on that board.

Description: Sample Block Diagram

Because there are many operations that could be performed, each of which may be affected by factors such as whether it is a factory board test, or perhaps an embedded test in the field we need to account for the 'context' in our analysis. From this data we will be able to determine what information is needed generally and where specific additional information is required to support a particular case.

That data needs to be collated systematically and consistently, so we needed a repeatable method of analysis.

Design patterns and templates are intended to be used as a tool to help identify common recurring problems and find common, general solutions to solving them. This happens in architecture, mechanics, usability, human behavior, programming, and electronics. A good example in electronics is the device datasheet. The template presented attempts to provide a common language to describe the environment and behavior of a tester and the unit under test to perform a specific problem domain solution. Each completed template identifies a specific problem and how that is solved by an SJTAG solution.

We have assembled an analysis 'template' that we aim to use to determine the following characteristics for each context:

  • ANALYSIS DESCRIPTION NAME
  • ANALYSIS DESCRIPTION IDENTIFIER
  • OPERATION OVERVIEW BEING ANALYZED
  • DESIGN TARGETED
  • USE CASE TARGETED
  • PRODUCT LIFE CYCLE STAGE ADDRESSED
  • INHERITANCE
  • ASSUMPTIONS
  • DEPENDENCIES
  • OPERATIONAL LEVEL REQUIRED
  • JTAG TECHNIQUES USED
  • TEST ACCESS POINT
  • TEST CONFIGURATION REQUIRED
  • SIMILAR DESCRIPTIONS
  • SIBLING DESCRIPTIONS

Unfortunately, in a short newsletter like this we can't really expand on those headings - we know that some may seem intriguing and others simply unintelligible at first glance, so we'd encourage you to look at the complete descriptions on our Wiki.

Wiki link: http://wiki.sjtag.org/index.php?title=Design_Analysis_Template


Newsfeed Extracts

Description: News Feed

The column to the right of the page gives an outline of some very recent news items, mainly summaries from recent meeting minutes. You can keep up to date with SJTAG news items through our RSS feeds or for a more detailed description of our activities you can read over our meeting minutes.

http://www.sjtag.org/rss.html
http://www.sjtag.org/minutes.html


Next Newsletter

The Q4-2013 edition of this newsletter will be published towards the end of October 2013. Copies of past newsletters are always available on the SJTAG website.

Please use the link at the foot of the page to forward this newsletter to colleagues who may be interested in the work of the SJTAG Group.

http://www.sjtag.org/newsletters.html


News from the website

Meeting Minutes from July 22nd (Issued: Mon, 29 Jul 2013 19:50:00 GMT)

The minutes from the weekly meeting held on July 22nd, 2013 have now been published. This meeting centered on a proposed template form to be used to collate data gathered during analysis of a particular instance of applying a Use Case to a circuit at a specific lifecycle stage.

Click to read more...


Meeting Minutes from July 8th (Issued: Mon, 22 Jul 2013 20:13:00 GMT)

The minutes from the weekly meeting held on July 8th, 2013 have now been published. This meeting discussed the Expanded Board Diagram from Ian's System Examples slides, clarifying labelling.

Click to read more...


Meeting Minutes from June 24th (Issued: Tue, 09 Jul 2013 18:43:00 GMT)

The minutes from the weekly meeting held on June 24th, 2013 have now been published. Key takeaways from this meeting: 1. Need to consider how dot7 networks can be included within board or system designs. 2. The majority of embedded BScan applications will only be used for POST.

Click to read more...


Meeting Minutes from June 10th (Issued: Wed, 26 Jun 2013 21:18:00 GMT)

The minutes from the weekly meeting held on June 10th, 2013 have now been published. Key takeaways from this meeting: 1. Gateways, Selectors, and JTAG Switches all represent an abstraction of an addressable connection to a chain segment. 2. Plug-n-Play features are required to be defined by the architecture of a system. 3. Board BIST has no knowledge of system concerns. 4. Gateways provide some level of "PING" capability to identify populated slots in the system. 5. Default vectors could be used to ensure non-driving of the backplane while only one board drives at a time to reduce modeling overhead. 6. Gunnar's 2005 ITC paper is relevant.

Click to read more...


Meeting Minutes from June 3rd (Issued: Tue, 11 Jun 2013 21:08:00 GMT)

The minutes from the weekly meeting held on June 3rd, 2013 have now been published. Key takeaways from this meeting: 1. The progression from XBST towards a full EBST is really polymorphic. 2. The level of intelligence inherent in the UUT is a factor in how far towards EBST you can go. 3. There is a need to cater for all complexities of system, from a simple system through to a complete embedded diagnostic capability. Cost burden and volume will be factors. 4. Adopting EBST may be a trade off against capital cost of test facilities.

Click to read more...


Meeting Minutes from May 20th (Issued: Thu, 06 Jun 2013 20:20:00 GMT)

The minutes from the weekly meeting held on May 20th, 2013 have now been published. Key takeaways from this meeting: 1. It seems unlikely that we can arrive at a more precise definition of what a 'system' is for SJTAG.

Click to read more...


Meeting Minutes from May 13th (Issued: Mon, 20 May 2013 20:18:00 GMT)

The minutes from the weekly meeting held on May 13th, 2013 have now been published. Key takeaways from this meeting: 1. P1687 is serving to make JTAG access to instruments more unified with access to memory mapped instruments. 2. There is a need to remove ambiguities from our terminology, e.g. 'system', 'manufacture', etc.

Click to read more...


Meeting Minutes from May 6th (Issued: Tue, 14 May 2013 19:21:00 GMT)

The minutes from the weekly meeting held on May 6th, 2013 have now been published. This was a shortened meeting that discussed some issues associated with the use of a network stack analogy.

Click to read more...