Minutes of P2654 Working Group Meeting No.11, 2019-03-11

Meeting called to order: 11:05 AM EDT

The slide references relate to the pack used during this meeting, located here: http://files.sjtag.org/P2654WG/P2654_Meeting_11.pdf

1. Roll Call

Ian McIntosh (Leonardo)
Terry Duepner (National Instruments)
Brian Erickson (JTAG Technologies)
Bill Huynh (Marvell Inc.)
Joel Irby (Arm)
Rakesh Kumar (Ampere Computing)
Richard Pistor (Curtiss-Wright)
Jan Schat (NXP Semiconductors)
Naveen Srivastava (Nvidia)
Jon Stewart (Dell)
Brad Van Treuren (No affiliation)
Louis Ungar (A.T.E. Solutions)
Carl Walker (Cisco Systems) (left 11:30)


By email (non-attendees):

Eric Cormack (DFT Solutions)
Heiko Ehrenberg (GOEPEL Electronics)

2. Agenda

Brian moved to accept the agenda as proposed, seconded by Brad, no objections.

3. IEEE Patent Slides

  • {Slides 5-9}
  • Patent slides reviewed.
    • No comments.

4. Review and Approve Previous Minutes

  • {Slide 10}
  • Meeting #10, March 4 (draft circulated March 4)
    • No corrections noted.
    • Email discussion on PDL and Tcl took place after the meeting.
    • Noted that there is an intent to revise 1687 chapter 8 description of PDL-1 to define a specific subset of Tcl that is allowed. This will place it in conflict with the description in 1149.1-2013.
    • Terry moved to approve, Brad seconded, no objections or abstentions → minutes approved.

5. Review Open Action Items

6. Discussion Topics

6 a) Update on WG Elections {Slide 12}

  • Louis has been added as an additional Elections Auditor.
  • Ballots will go out shortly after this meeting - a single ballot form for all four offices. Reply by returning the form with your votes marked to This email address is being protected from spambots. You need JavaScript enabled to view it. before the end of the day on March 24 when the voting period closes (baseline P&P defines a voting period of 14 days minimum).
  • Votes will be tabulated during the following week and the result declared at the meeting on April 1st.
  • Voting members will be listed on the ballot form so individuals can check their eligibility to vote. Note that while serving as an officer requires IEEE-SA membership, voting has no such additional requirement. 

6 b) Top-down and bottom-up: Further review and discussion of diagram(s) {Slide 13}

  • The diagrams used last week were used again {slides 14 - 24}.
  • Do these Use Case diagrams really describe the lower levels? Have we not yet got to the top level(s)? Really just defining the roles for now.
  • In defining the instrument, the device designer could also shut you out. As you move up the "food chain" you could restrict (intentionally) or remove (unintentionally) access.
  • DPIC Protocol Primitives (slide 16) are counterparts to iRead and iWrite.
  • Slide 18 shows a stand-alone ATE environment using static vectors, while slide 17 is a board-level, embedded case. These are cases 1 and 3 from Jeff Rearick's slides; neither addresses a dynamic case.
    • A board designer can expose an instrument or lock out the user.
    • Similarly, board S/W can lock out system test.
  • pProc (slide 20) is a parameterized Proc.
  • PDL-0 does not provide a means to read back a value only to compare with an expected value. PDL-1 allows reading a value.
  • PDL-1 is called from a Tcl Proc and can pass any parameter - just a string (i.e. not 'typed'). pProc adds argument validation. Validation is typically done at run time since PDL/Tcl is an interpretive language.
  • Can use PDL as a transformation language, transforming to e.g. C++, although DPIC Primitives would just be stubs that would have to be expanded by the S/W engineer.

7. Any Other Business

  • {Slide 25}
  • TESTA workshop within ETS'19 and AutoTestCon: Abstracts have been entered in the respective submission systems.
  • AutoTestCon abstract is revisable until March 15.

8. Today's Key Takeaways

  • The capability of any level is dependent on the advertised features of all its lower levels, not just the level immediately below.

9. Glossary Terms from This Meeting

  • None.
  • Carried over:
    • "Interface" is missing.
      • No obvious IEEE accepted definition.
      • 1687 has definitions for specialised forms: Device Interface and Instrument Interface.
      • We may need specialised forms for Software Interface and Hardware Interface.
      • "Interface" is overloaded and requires disambiguation.
    • 1687.1: Transformation, Retargetting.
    • IEEE 1856: Sense - "Sensor" done, Acquire, Analyze not really defined.
    • Device - do we mean a packaged device? May be many devices in a package. "Device" is often used as a modifier, e.g. "device package", "device identification".
    • Use Case Context, Application Context
    • Legacy Infrastructure, SJTAG Infrastructure (placeholders for now, really for working group to define).
    • "Generators": May need to be qualified as "Test Generators" (used by the integrator/tester) and "Model Generators" (used by IP providers, interface designers, etc.).
    • AccessLink and DataLink descriptions will need to be revised.
    • See P1687.1's definitions on Slide 31 of the pack presented by Jeff Rearick on Jan 14, 2019.

10. Schedule next meeting

  • March 18, 2019.

11. Topic for next meeting

  • Top-down and bottom-up: Further review and discussion of diagrams; differences between retargeting and transformation cases.

12. Reminders

  • None.

13. List New Action Items

  • None.

14. Adjourn

  • Brad moved to adjourn, seconded by Jon.
  • Meeting adjourned at 12:03 PM EDT

Respectfully submitted,
Ian McIntosh